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Dec 11

Free UVM training + labs: UVM Registers (RAL) – learn to automate

Free UVM training + labs: UVM Registers (RAL) – learn to automate

UVM Registers is often mis-understood part of UVM. While the true potential/power of it is very high, common, ill-guided misuse has somewhat diminished its adoption in the industry. This is an attempt to demystify UVM Registers by CVC – a global UVM expert team! We will do this in parts, the first part focuses on register modelling, automating the model creation and running the created model.

When: 2 choices:

  • Weekday: 17-Dec-2014, Wednesday, 16.00 – 19.00 (4 PM to 7 PM) @ CVC, Bengaluru
  • Weekend: 21-Dec-2014, Sunday,16.00 – 19.00  (4 PM to 7 PM) @ CVC, Bengaluru

Register at: http://goo.gl/forms/XQolI1IR5R

Address: http://cvcblr.com/?page_id=2 

Cost:  FREE

All Attendees will have the option of buying the best selling SVA book at 10% discount, see: http://verifnews.org/publications/books/ 

Hurry, limited seating, first-come-first-serve basis

Register at: http://goo.gl/forms/XQolI1IR5R

Agenda:

• UVM introduction

• Capturing registers in UVM

• Using XL sheet to capture Register Specification

• Running Questa RegAssist to create register model creation

• SPI IP with registers – an IP case study

Register via: http://goo.gl/forms/XQolI1IR5R 

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